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Logic Design and Verification Using SystemVerilog (Revised)
Logic Design and Verification Using SystemVerilog - Revised
Author: Donald Thomas
SystemVerilog is a Hardware Description Language that enables designers to work at the higher levels of logic design abstractions that match the increased complexity of current day integrated circuit and field-programmable gate array (FPGA) designs. The majority of the book assumes a basic background in logic design and software programming conc...  more »
ISBN-13: 9781523364022
ISBN-10: 1523364025
Publication Date: 3/1/2016
Pages: 336
Edition: Revised
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Publisher: CreateSpace Independent Publishing Platform
Book Type: Paperback
Members Wishing: 0
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