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Logic Design and Verification Using SystemVerilog
Logic Design and Verification Using SystemVerilog
Author: Donald Thomas
SystemVerilog is a Hardware Description Language that enables designers to work at the higher levels of logic design abstractions that match the increased complexity of current day integrated circuit and field-programmable gate array (FPGA) designs. The majority of the book assumes a basic background in logic design and software programming con...  more »
ISBN-13: 9781500385781
ISBN-10: 1500385786
Publication Date: 6/10/2014
Pages: 328
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Publisher: CreateSpace Independent Publishing Platform
Book Type: Paperback
Members Wishing: 0
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